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Dual 2A, 30V Step-down Regulator with Programmable Frequency up to 1.4MHz
POWER MANAGEMENT Description
The SC2620 is a constant frequency dual current-mode switching regulator with integrated 2.3A, 30V switches. Its switching frequency can be programmed up to 1.4MHz per channel. Due to the SC2620's high frequency operation, small inductors and ceramic capacitors can be used, resulting in very compact power supplies. The two channels of the SC2620 operate at 180 out of phase for reduced input voltage ripples. Separate soft start/enable pins allow independent control of each channel. Channel 1 power good indicator can be used for output start up sequencing to prevent latch-up. Current-mode PWM control achieves fast transient response with simple loop compensation. Cycle-by-cycle current limiting and hiccup overload protection reduce power dissipation during overload.
SC2620
Features
Wide Input Voltage Range 2.8V to 30V Up to 1.4MHz/Channel Programmable Switching Frequency Current-mode Control Out of Phase Switching Reduces Ripple Cycle-by-cycle Current-limiting Independent Shutdown/soft-start Pins Independent Hiccup Overload Protection Channel 1 Power Good Indicator Two 2.3A Integrated Switches Thermal Shutdown Thermally Enhanced SO-16 Lead Free Package Fully WEEE and RoHS Compliant
Applications
XDSL and Cable Modems Set-top Boxes Point of Load Applications CPE Equipment DSP Power Supplies
Typical Application Circuit
R5 C5 FB1 COMP1 BOOST1 SS1 22nF R9 46.4k SW1 ROSC 9V-16V VIN C15 R10 10F 10 VIN C9 COMP2 R7 33pF C8 10.5k 4.7nF FB2 BOOST2 GND SW2 D4 1N4148 C4 0.1F C16 0.1F D2 UPS120 L2 6.8H C3 22F OUT2 R3 1.2V/2A 2.61k R4 13k D3 C2 1N4148 0.1F L1 10H D1 UPS120 C1 22F R1 30.1k R2 13k
12.7k C6 1.5nF C7 47pF
V IN = 1 2 V
OUT1 3.3V/2A
CH1
SC2620
PGOOD1 PVIN
CH2
C10 SS2 22nF
CH3
4ms/div CH1 : OUT1 Voltage, 2V/div CH2 : OUT2 Voltage, 1V/div CH3 : SS2 Voltage, 2V/div Figure 1(b). VIN Start-up Transient (IOUT1= 1.5A, IOUT2= 0.8A). Channel 2 start is delayed until Channel 1 reaches regulation.
L1 & L2: Coiltr onics DR73
C1 & C3: Murata GRM21BR60J 226M C15: Murata GRM32DR61E106K
Figure 1(a). 550kHz 9V-16V VIN to 3.3V and 1.2V Stepdown Converter.
Revision: December 20th, 2006 1
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SC2620
POWER MANAGEMENT Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied.
Parameter Input Voltage Boost Pin Boost Pin Above SW PGOOD1 Pin Voltage SS Pins FB Pins SW Voltage Operating Ambient Temperature Range Thermal Resistance Junction to Ambient Thermal Resistance Junction to Case Maximum Junction Temperature Storage Temperature Range Lead Temperature (Soldering)10 sec ESD Rating (Human Body Model) (Note 1)
Symbol VIN VBST VBST-VSW VPGOOD1 VSS VFB VSW TA JA JC TJ TSTG TLEAD ESD
Max -0.3 to 32 42 24 VIN 3 -0.3 to VIN -0.6 to VIN -40 to 85 31 3.9 150 -65 to +150 300 1500
Units V V V V V V V C C/W C/W C C C V
Note 1: This device is ESD sensitive. Standard ESD handling precaution is required.
Electrical Characteristics
Unless specified: -40C < TA < 85C, -40C < TJ< 105C, ROSC = 12.1k, VIN = 5V, VBOOST = 8V
Parameter Input Voltage Range VIN Start Voltage VIN Start Hysteresis Quiescent Current Shutdown Current Feedback Voltage Feedback Voltage Line Regulation FB Pin Input Bias Current Error Amplifier Transconductance Error Amplifier Open-loop Gain COMP Source Current
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Conditions
Min 2.8 2.45
Typ
Max 30
Units V V mV
2.62 75
2.78
Not switching, PGOOD1 Open VSS1 = VSS2 = 0, PGOOD1 Open 0.980 VIN = 3V to 30V VFB = 1V, VCOMP = 1.5V
3.5 40 1.000 0.005 -15 280 53
5 60 1.020
mA A V %/ V
-30
nA -1 dB A
VFB = 0.8V, VCOMP = 1.5V
2
20
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SC2620
POWER MANAGEMENT Electrical Characteristics (Cont.)
Unless specified: -40C < TA < 85C, -40C < TJ< 105C, ROSC = 12.1k, VIN = 5V, VBOOST = 8V
Parameter COMP Sink Current COMP Pin to Switch Current Gain COMP Switching Threshold COMP Maximum Voltage Channel Switching Frequency Maximum Duty Cycle Switch Current Limit Switch Saturation Voltage Switch Leakage Current Minimum Boost Voltage Boost Pin Current Minimum Soft-Start Voltage to Exit Shutdown Soft-start Charging Current Soft-start Discharging Current Minimum Soft-start Voltage to Enable Overload Shutoff FB Overload Threshold Soft-start Voltage to Restart Switching After Overload Shutoff Power Good Threshold Below FB1 Power Good Output Low Voltage Power Good Pin Leakage Current Thermal Shutdown Temperature Thermal Shutdown Hysteresis
Conditions VFB = 1.2V, VCOMP = 1.5V
Min
Typ 20 8
Max
Units A A/V
0.7 VFB = 0.9V 1.2 (Note 3) (Notes 2 and 4) ISW = -2A 80 2.3
1.1 2.4 1.4 90 3.2 0.3
1.3
V V
1.6
MHz % A V
10 ISW = -2A (Note 2) ISW = -0.5A ISW = -2A SS1 Tied to SS2 VSS = 0V VSS = 1.5V VSS = 1.5V VSS Rising VSS = 2.3V, VFB Falling VSS Falling VFB1 Rising VFB1 = 0.8V, IPGOOD1 = 250A VPGOOD1 = 5V 0.7 80 0.2 1.8 20 60 0.4 2 1.8 0.8 2 0.7 1 100 0.2 0.1 155 10 1.3 120 0.4 1 0.7 2.5
A V mA mA V A A A V V V mV V A C C
Note 2: Guaranteed by design, not 100% tested in production. Note 3: The maximum duty cycle specified corresponds to 1.4MHz switching frequency. Duty cycles higher than those specified can be achieved by lowering the operating frequency. Note 4: Switch current limit does not vary with duty cycle.
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SC2620
POWER MANAGEMENT Pin Configuration
TOP VIEW
FB1 BOOST1 SW1 PVIN1 PVIN2 SW2 BOOST2 FB2
1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9
Ordering Information
Part Number SC2620SETRT(1)(2)
COMP1 PGOOD1 SS1 ROSC VIN GND SS2 COMP2
Package SOIC-16 EDP Evaluation Board
SC2620EVB
Notes: (1) Only available in tape and reel packaging. A reel contains 2500 devices. (2) Lead free product. This product is fully WEEE and RoHS compliant.
(16 Pin SOIC-EDP)
Underside metal must be soldered to ground.
Pin Descriptions
Pin # 1, 8 2, 7 3, 6 Pin Name FB1, FB2 BOOST1, BOOST2 SW1, SW2 Pin Function The inverting inputs of the error amplifiers. Each FB pin is tied to a resistive divider between its output and ground to set the channel output voltage. Supply pins to the power transistor drivers. Tie to external diode-capacitor charge pumps to generate drive voltages higher than V IN in order to fully enhance the internal NPN power switches. Emitters of the internal power NPN transistors. Each SW pin is connected to the corresponding inductor, freewheeling diode and bootstrap capacitor. Collectors of the internal power transistors and the power supplies to the corresponding current sensing circuits. Pins 4 and 5 are not internally connected. They must be joined on the PCB and closely bypassed to the power ground plane. Outputs of the internal error amplifiers. The voltages at these pins control the peak switch currents. RC networks at these pins stabilize the control loops. Pulling either pin below 0.7V stops the corresponding switching regulator. A capacitor from either SS pin to ground provides soft-start and overload hiccup functions for that channel. Pulling either SS pin below 0.8V with an open drain or collector transistor shuts off the corresponding regulator. To completely shut off the SC2620 to low-current state, pull both SS pins to ground. Soft-start is recommended for all applications. Analog ground. Connect to the PCB power ground plane at a single point. Power supply to the analog control section of the SC2620. Connect to the PVIN pins through an optional RC filter. An external resistor between this pin and the analog ground sets the channel switching frequency. Open collector output of Channel 1 power good comparator. Tie to an external pull-up resistor from the input or the output of the converter. PGOOD1 output becomes valid as soon as V IN rises above 1 VBE during power-up. PGOOD1 is actively pulled low until FB1 voltage rises to within 10% of its final regulation voltage. The exposed pad at the bottom of the package is electrically connected to the ground pin of the SC2620. It also serves as a thermal contact to the circuit board. It is to be soldered to the analog ground plane of the PC board.
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4, 5
PVIN1, PVIN2
9, 16
COMP1, COMP2
10, 14
SS1, SS2
11 12 13
GND VIN ROSC
15
PGOOD1
Underside Metal
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SC2620
POWER MANAGEMENT Block Diagrams
4 PVIN1
PGOOD1
15
CHANNEL 1 ONLY + POWER GOOD 100mV
+ +
+ ILIM -
+ ISEN 6.3m 20mV BOOST1
2
SLOPE COMP 1
COMP1
16
FB1
1
+ EA
+ PWM -
S Q R POWER TRANSISTOR
SS1
14
FB1
3
SW1
1V SS2
10
0.7V FAULT
REFERENCE & THERMAL SHUTDOWN SLOPE COMP 1
Soft-Start And Overload Hiccup Control 1
OVLD
12 VIN SLOPE COMP 2
ROSC
13
SLOPE COMP OSCILLATOR CLK1 FREQUENCY CLK2 DIVIDER
11 GND
Figure 2. SC2620 Block Diagram (Channel 1)
FB 0.7V SS
+ 1.8A
S Q R 1V/2V OVLD
FAULT 2.6A
Figure 3. Details of the Soft-Start and Overload Hiccup Control Circuit
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SC2620
POWER MANAGEMENT Typical Characteristics
Feedback Voltage vs Temperature
1.02 VIN = 5V 1.01 1.00 0.99 0.98 0.97 -50 -25 0 25 50 75 100 125 Temperature (C)
Frequency Setting Resistor vs Channel Frequency
1000
VIN = 5V Normalized Frequency 1.05 1.10
Normalized Channel Frequency vs Temperature
600kHz
ROSC (k )
VFB (V)
100
1.00 1.4MHz 0.95
10
0.0 0.5 1.0 1.5
0.90 -50 -25 0 25 50 75 100 125
Frequency (M Hz)
Temperature (C)
400
Switch Saturation Voltage vs Switch Current
125C
Switch Current Limit vs Temperature
3.6 3.4 Current Limit (A) 3.2 3.0 2.8
Boost Pin Current vs Switch Current
80
V IN = 5V Boost Pin Current (mA) V BST = 8V
VCESAT (mV)
300
-40C
60
-40C
40
125C
200
20
25C 100 0.0 0.5 1.0 1.5 2.0 2.5 Switch Current (A) 2.6 -50 -25 0 25 50 75 100 125 Temperature (C)
0
0.0 0.5 1.0 1.5 2.0 2.5 Switch Current (A)
SS Shutdown Threshold vs Temperature
0.40
VSS1 = VSS2
V IN Shutdown Current vs V IN
200 TA = 25C
VIN Current ( A)
V IN Current (mA) 4
VIN Quiescent Current vs VIN
SS Threshold (V)
0.35
150
3
0.30
100
2
0.25
50 VSS1 = VSS2 = 0
1 TA = 25C 0 0 5 10 15 VIN (V) 20 25 30
0.20 -50 -25 0 25 50 75 100 125 Tempe rature (C)
0 0 5 10 15 VIN (V) 20 25 30
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SC2620
POWER MANAGEMENT Typical Characteristics
Soft-Start Pin Current vs Soft-Start Voltage
0 T = 25C -20 VIN =5V -40 I SS ( A) -60 -80
1 3
FB Threshold (V)
VIN Supply Current vs Soft-Start Voltage
4
TA = 25C
0.9 1.0
FB Overload Threshold vs Temperature
I IN (mA)
ISS of the Swept Channel
0.8
2
VIN = 5V
0.7
VSS1 = VSS2
VCOMP1 = 0
VCOMP2 = 0
-100 -120 0.0 0.5
ISS of the Other Channel (VSS = 0)
0
0.6
0.5
1.0 VSS (V)
1.5
2.0
0.0
0.5
1.0 VSS (V)
1.5
2.0
-50
-25
0
25
50
75
100 125
Temperature (C)
PGOOD1 Threshold to VFB Difference Voltage vs Temperature
-90
90 85
Efficiency vs Load Current
-92
Voltage (mV )
Efficiency (%)
80 75 70 65 60 55
VOUT1 = 3.3V
-94
VOUT2 = 1.2V
-96
-98
50 45
Figure 1(a), VIN =12V
-100 -50 -25 0 25 50 75 100 125 Temperature (C)
40 0 0.5 1 1.5 2 Load Current (A)
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SC2620
POWER MANAGEMENT Operation
The SC2620 is a 30V 2-channel constant-frequency peak current-mode step-down switching regulator with integrated 2.3A power transistors. Both regulators in the SC2620 operate from a common input power supply and share the same voltage reference and the master oscillator. Turn-on of the power transistors is phase-shifted by 180. The two regulator cores are otherwise completely identical, independent and are capable of producing two separate outputs from the same input. The channel frequency can be programmed with an external resistor from the ROSC pin to ground. This allows the designer to set the switching frequency according to the input to the output voltage conversion ratio. Peak current-mode control is utilized for the SC2620. The double reactive poles of the output LC filter are reduced to a single real pole by the inner current loop, easing loop compensation. Fast transient response can be achieved with a simple Type-2 compensation network. Switch collector current is sensed with an integrated 6.3m sense resistor. The sensed current is summed with slopecompensating ramp before it is compared with the transconductance error amplifier output. The PWM comparator tripping point determines the switch turn-on pulse width (Figure 2). The current-limit comparator ILIM turns off the power switch when the sensed-signal exceeds the 20mV current-limit threshold. ILIM therefore provides cycle-by-cycle limit. Current-limit does not vary with dutycycle. An external charge pump (formed by the capacitor C2 and the diode D3 in Figure 1(a)) generates a voltage higher than the input rail at the BOOST pin. The bootstrapped voltage generated becomes the supply voltage for the power transistor driver. Driving the base of the power transistor above the input power supply rail minimizes the power transistor turn-on voltage and maximizes efficiency. The SS pin is a multiple-function pin. An external capacitor connected from the SS pin to ground together with the internal 1.8A and 2.6A current sources set the softstart and overload shutoff times of the regulator (Figure 3). The SS pin can also be used to shut off the corresponding regulator. When either SS pin is pulled below 0.8V, that regulator is turned off. If both SS pins are pulled below 0.2V, then the SC2620 undergoes overall shutdown. The current drawn from the input power supply reduces to 40A. When either SS pin is released, the corresponding soft-start capacitor is charged with a 2A current source (not shown in Figure 3). As either SS voltage exceeds 0.3V, the internal bias circuit of the SC2620 is enabled. The SC2620 draws 3.5mA from VIN. An internal fast charge circuit quickly charges the soft-start capacitor to 1V. At this juncture, the fast charge circuit turns off and the 1.8A current source slowly charges the soft-start capacitor. The output of the error amplifier is forced to track the slow soft-start ramp at the SS pin. When the COMP voltage exceeds 1.1V, the switching regulator starts to switch. During soft-start, the current limit of the converter is gradually increased until the converter output comes into regulation. Hiccup overload protection is utilized in the SC2620. Overload shutdown is disabled during soft-start (VSS < 2V). In Figure 3 the reset input of the overload latch will remain high if the SS voltage is below 2V. Once the soft-start capacitor is charged above 2V, the overload shutdown latch is enabled. As the load draws more current from the regulator, the current-limit comparator will limit the peak inductor current. This is cycle-by-cycle current limiting. Further increase in load current will cause the output voltage to decrease. If the output voltage falls below 70% of its set point, then the overload latch will be set and the soft-start capacitor will be discharged with a net current of 0.8A. The switching regulator is shut off until the softstart capacitor is discharged below 1V. At this moment, the overload latch is reset. The soft-start capacitor is recharged and the converter again undergoes soft-start. The regulator will go through soft-start, overload shutdown and restart until it is no longer overloaded. The power good comparator indicates that the channel 1 regulator output has risen to within 10% of its set value. The open collector output of the power good comparator will be actively pulled low if its feedback voltage is below 0.9V.
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SC2620
POWER MANAGEMENT Applications Information
Setting the Output Voltage The regulator output voltage is set with an external resistive divider (Figure 4) with its center tap tied to the FB pin.
VOUT
Channel switching frequency is limited by the minimum controllable on time at low duty cycles. For VIN > 20V, setting the switching frequency below 500kHz makes converter output short circuit operation more robust. These will be described in more details later. Minimum On Time Consideration
R1 15nA
SC2620
FB
The operating duty cycle of a non-synchronous step-down switching regulator in continuous-conduction mode (CCM) is given by
R2
D=
Figure 4. VOUT is set with a Resistive Divider
VOUT + VD VIN + VD - VCESAT
(2)
R1 = R2 (VOUT - 1)
(1)
where VCESAT is the switch saturation voltage and VD is voltage drop across the rectifying diode. Duty cycle decreases with increasing
The percentage error due the input bias current of the error amplifier is
VIN ratio. In peak VOUT
R VOUT - 15nA 100 (R1 2 ) = . VOUT 1V
Example: Determine the output voltage error of a VOUT = 5 V converter with R 2 = 51.1k . From (1),
R1 = 51.1k (5 - 1) = 205k VOUT - 15nA 100 (51.1k205k) = = -0.061% . VOUT 1V
current-mode control, the PWM modulating ramp is the sensed current ramp of the power switch. This current ramp is absent unless the switch is turned on. The intersection of this ramp with the output of the voltage feedback error amplifier determines the switch pulse width. The propagation delay time required to immediately turn off the switch after it is turned on is the minimum controllable switch on time (T ON (MIN) ). Closed-loop measurement of the SC2620 with low
VOUT ratios shows VIN
Minimum On Time vs Ambient Temperature
130
TON(MIN) (ns)
This error is at least an order of magnitude lower than the ratio tolerance resulting from the use of 1% resistors in the divider string. Setting the Channel Frequency The switching frequency of the master oscillator is set with an external resistor from the ROSC pin to ground. Channel frequency is one-half of that of the master oscillator. A graph of channel frequency against ROSC is shown in the "Typical Performance Characteristics". Channel frequency is programmable up to 1.4MHz.
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120 110 100 90 80 -50 -25 0 25 50 75 100 Temperature (C)
Figure 5. Variation of Minimum On Time with Ambient Temperature.
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SC2620
POWER MANAGEMENT Applications Information
that the minimum on time is about 105ns at room temperature (Figure 5). The power switch in the SC2620 is either not turned on at all or for at least TON(MIN). If the Example: Determine the maximum operating frequency of a dual 5V to 1.5V and 5V to 4V switching regulator using the SC2620. Assuming that VD = 0.45V, VCESAT = 0.25V and VIN = 4.5V (10% low line), the duty ratios D1 and D 2 of the 1.5V and 4V converters can be calculated using (2).
D ) is shorter than the minimum f on time, the regulator will either skip cycles or it will jitter.
required switch on time (= Example: Determine the maximum operating frequency of a dual 24V to 1.2V and 24V to 3.3V switching regulator using the SC2620. Assuming that VD = 0.45V, VCESAT = 0.25V and VIN = 26.4V (10% high line), the corresponding duty ratios, D1 and D2, of the 1.2V and 3.3V converters can be calculated using (2).
D1 =
1.5 + 0.45 = 0.42 4.5 + 0.45 - 0.25 4 + 0.45 = 0.95 . 4.5 + 0.45 - 0.25
D2 =
The maximum operating channel frequency of the dual
1.2 + 0.45 = 0.062 D1 = 26.4 + 0.45 - 0.25 D2 = 3.3 + 0.45 = 0.14 26.4 + 0.45 - 0.25
1.5V and the 4V converter is therefore
1 - D2 = 410kHz . 120ns
Transient headroom requires that channel frequency be lower than 410kHz. Inductor Selection The inductor ripple current IL for a non-synchronous stepdown converter in continuous-conduction mode is
IL = ( VOUT + VD )(1 - D) ( VOUT + VD )( VIN - VOUT - VCESAT ) = fL ( VIN + VD - VCESAT ) fL
To allow for transient headroom, the minimum operating switch on time should be at least 30% higher than the worst-case minimum on time exhibited in Figure 5. Designing for a switch on time of 150ns at VIN = 26.4 V , the maximum operating frequency of the 24V to 1.2V and 3.3V converter is
D1 = 410kHz . 150ns
(3) Minimum Off Time Limitation where f is the switching frequency and L is the inductance. The PWM latch in Figure 2 is reset every period by the clock. The clock also turns off the power transistor to refresh the bootstrap capacitor. This minimum off time limits the attainable duty cycle of the regulator at a given switching frequency. The measured minimum off time is 120ns. For a step-down converter, D increases with increasing In current-mode control, the slope of the modulating (sensed switch current) ramp should be steep enough to lessen jittery tendency but not so steep that large flux swing decreases efficiency. Inductor ripple current IL between 25-40% of the peak inductor current limit is a good compromise. Inductors so chosen are optimized in size and DCR. Setting IL = 0.3(2.3) = 0.69 A ,
VOUT VIN
ratio. If the required duty cycle is higher than the attainable maximum, then the output voltage will not be able to reach its set value in continuous-conduction mode.
VD = 0.45 V and VCESAT = 0.25 V in (3),
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SC2620
POWER MANAGEMENT Applications Information
( V + 0.45)( VIn - VOUT - 0.25) L = OUT ( VIN + 0.2)(0.69) f
where L is in H and f is in MHz. Equation (3) shows that for a given VOUT , IL increases as D decreases. If VIN varies over a wide range, then choose L based on the nominal input voltage. Always verify converter operation at the input voltage extremes. The peak current limits of both SC2620 power transistors are internally set at 3.2A. The peak current limits are dutycycle invariant and are guaranteed higher than 2.3A. The maximum load current is therefore conservatively:
IOUT (MAX ) = ILM - IL I = 2 .3 A - L 2 2
2 Power dissipated in the input capacitor is IRMS( CIN) (ESR) .
(4)
Equation (6) has a maximum value of
IOUT 1 ( at D = ), 2 2 corresponding to the worst-case power dissipation I2 ESR OUT in CIN. 4
(5)
A dual-channel step-down converter with interleaved switching reduces the RMS ripple current in the input capacitor to a fraction of that of a single-phase buck converter. If both power transistors in the SC2620 were to switch on in phase, the current drawn by the SC2620 would consist of current pulses with amplitude equal to the sum of the channel output currents. If each channel were delivering IOUT and operating at 50% duty cycle, then the input current would switch from zero to 2IOUT. The RMS ripple current in the input capacitor would then be IOUT. Power dissipated in CIN would be I2 ESR , 4 times that OUT of a single-channel converter. The SC2620 produces the highest RMS ripple current in CIN when only one channel is running and delivering the maximum output current (2A). The input capacitor therefore should have a RMS ripple current rating of at least 1A. Multi-layer ceramic capacitors, which have very low ESR (a few m) and can easily handle high RMS ripple current, are the ideal choice for input filtering. A single 4.7F or 10F X5R ceramic capacitor is adequate. For high voltage applications, a small ceramic (1F or 2.2F) can be placed in parallel with a low ESR electrolytic capacitor to satisfy both the ESR and bulk capacitance requirements. Output Capacitor The output ripple voltage VOUT of a buck converter can be expressed as
If IL = 0.3 ILM , then
IOUT(MAX ) = ILM -
IL 0.3ILM = ILM - = 0.85 ILM . 2 2
The saturation current of the inductor should be 20-30% higher than the peak current limit (2.3A). Low-cost powder iron cores are not suitable for high-frequency switching power supplies due to their high core losses. Inductors with ferrite cores should be used. Power Line Input Capacitor A buck converter draws pulse current with peak-to-peak amplitude equal to its output current IOUT from its input supply. An input capacitor placed between the supply and the buck converter filters the AC current and keeps the current drawn from the supply to a DC constant. The input capacitance CIN should be high enough to filter the pulse input current. Its equivalent series resistance (ESR) should be low so that power dissipated in the capacitor does not result in significant temperature rise and degrade reliability. For a single channel buck converter, the RMS ripple current in the input capacitor is
1 VOUT = IL ESR + 8 fC OUT
where COUT is the output capacitance.
(7)
IRMS( CIN) = IOUT D(1 - D) .
(6)
Inductor ripple current IL increases as D decreases (Equation (3)). The output ripple voltage is therefore the highest when VIN is at its maximum. The first term in (7) results from the ESR of the output capacitor while the
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SC2620
POWER MANAGEMENT Applications Information
second term is due to the charging and discharging of COUT by the inductor ripple current. Substituting I L = 0.69A, f = 500kHz and COUT = 22F ceramic with ESR = 2m in (7), their bases will have to be driven from a power supply higher in voltage than VIN. The required driver supply voltage (at least 2.5V higher than the SW voltage over the industrial temperature range) is generated with a bootstrap circuit (the diode DBST and the capacitor CBST in Figure 7). The bootstrapped output (the common node between DBST and CBST) is connected to the BOOST pin of the SC2620. The power transistor in the SC2620 is first switched on to build up current in the inductor. When the transistor is switched off, the inductor current pulls the SW node low, allowing CBST to be charged through DBST. When the power switch is again turned on, the SW voltage goes high. This brings the BOOST voltage to VSW + VC BST , thus back-biasing DBST. CBST voltage increases with each subsequent switching cycle, as does the bootstrapped voltage at the BOOST pin. After a number of switching cycles, CBST will be fully charged to a voltage approximately equal to that applied to the anode of DBST. Figure 6 shows the typical minimum BOOST to SW voltage required to fully saturate the power transistor. This differential voltage ( = VC BST ) must be at least 1.8V at room temperature. This is also specified in the "Electrical Characteristics" as "Minimum Bootstrap Voltage". The minimum required V C BST increases as temperature decreases. The bootstrap circuit reaches equilibrium when the base charge drawn from CBST during transistor on time is equal to the charge replenished during the off interval.
VOUT = 0.69 A (2m + 11.4m) = 1.4mV + 7.8mV = 9.2mV
Depending on operating frequency and the type of capacitor, ripple voltage resulting from charging and discharging of COUT may be higer than that due to ESR. A 10F to 47F X5R ceramic capacitor is found adequate for output filtering in most applications. Ripple current in the output capacitor is not a concern because the inductor current of a buck converter directly feeds COUT, resulting in very low ripple current. Avoid using Z5U and Y5V ceramic capacitors for output filtering because these types of capacitors have high temperature and high voltage coefficients. Freewheeling Diode Use of Schottky barrier diodes as freewheeling rectifiers reduces diode reverse recovery input current spikes, easing high-side current sensing in the SC2620. These diodes should have an average forward current rating between 1A and 2A and a reverse blocking voltage of at least a few volts higher than the input voltage. For switching regulators operating at low duty cycles (i.e. low output voltage to input voltage conversion ratios), it is beneficial to use freewheeling diodes with somewhat higher average current ratings (thus lower forward voltages). This is because the diode conduction interval is much longer than that of the transistor. Converter efficiency will be improved if the voltage drop across the diode is lower. The freewheeling diodes should be placed close to the SW pins of the SC2620 to minimize ringing due to trace inductance. 10BQ015, 20BQ030 (International Rectifier), MBRM120LT3 (ON Semi), UPS120 and UPS140 (MicroSemi) are all suitable. Bootstrapping the Power Transistors To maximize efficiency, the turn-on voltage across the internal power NPN transistors should be minimized. If these transistors are to be driven into saturation, then
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Minimum Bootstrap Voltage vs Temperature
2.4 2.2 Voltage (V) 2.0 1.8 1.6 1.4 -50 -25 0 25 50 75 100 Temperature (C)
Figure 6. Typical Minimum Bootstrap Voltage Required to Maintain Saturation at ISW = 2A.
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SC2620
POWER MANAGEMENT Applications Information
ISW I SW , where ISW and +1 are the switch emitter current and current gain respectively,
The switch base current = refreshed to VA - VDBST + VDRECT every cycle, where VA is the applied DBST anode voltage. Switch base current discharges the bootstrap capacitor to VA - VDBST + VDRECT -
IT is drawn from the bootstrap capacitor CBST. Charge SW ON is drawn from CBST during the switch on time, resulting in a
voltage droop of
ISW TON at the CBST
I SW TON . If ISW = 2A, TON = 1s, = 35 and CBST
end of conduction. This voltage must be higher than the minimum shown in Figure 6 to ensure full switch enhancement. DBST can be tied either to the input or to the output of the DC/DC converter. If DBST is tied to the input, then the charge drawn from the
MAX VBST = 2VIN
CBST = 0.1F, then the VCBST droop will be 0.57V. CBST is
MAX VBST = VIN + VOUT
DBST
DBST
BOOST VIN IN SW
CBST VOUT VIN IN D
BOOST
CBST VOUT SW
SC2620
GND
SC2620
RECT GND
DRECT
(a) DBST DZ
(b)
MAX VBST = 2VIN - VZ
VS > 2.5V
DBST
MAX VBST = VIN + VS
+ VZ BOOST VIN IN SW CBST VOUT VIN IN SW BOOST CBST VOUT
SC2620
GND
D RECT
SC2620
GND
DRECT
(c) VS > VIN + 2.5V DBST
(d)
MAX VBST = VS
BOOST VIN IN SW VOUT
SC2620
GND
D RECT
(d)
Figure 7. Methods of Bootstrapping the SC2620.
2006 Semtech Corp. 13 www.semtech.com
SC2620
POWER MANAGEMENT Applications Information
input power supply will be
I SW TON (the base charge of the switch). The energy loss due to base charge per cycle is I SW VIN TON DISW VIN I SW VOUT for a power loss of .
If DBST is tied to the output, then the charge drawn from the output capacitor will still be due to base charge per cycle is loss of
at the BOOST pin. The maximum BOOST pin voltage is about V IN + VOUT . If the output is below 2.8V, then DBST will preferably be a small Schottky diode (such as BAT-54) to maximize bootstrap voltage. A 0.33-0.47F bootstrap capacitor may be needed to reduce droop. Bench measurement shows that using Schottky bootstrapping diode has no noticeable efficiency benefit. The SC2620 can also be bootstrapped from the input (Figure 7(b)). This configuration is not as efficient as Figure 7(a). However this may be only option if the output voltage is less than 2.5V and there is no other supply with voltage higher than 2.5V. Voltage stress at the BOOST pin can be somewhat higher than 2VIN. The Zener diode in Figure 7(c) reduces the maximum BOOST pin voltage. The BOOST pin voltage should not exceed its absolute maximum rating of 42V. Figures 7(d) and (e) show how to bootstrap the SC2620 from a second power supply VS with voltage > 2.5V. VS in Figure 7(d) can be the output of the other channel. Figures 1(a), 17(a) and 18(a) show this bootstrapping method. If Channel 1 fails in these converters, Channel 2 will be shut off (See Sequencing the Outputs). Proper bootstrapping of Channel 2 therefore depends on the readiness of VOUT1. This may be a drawback in some applications. DBST in Figure 7(e) prevents start up difficulty if VIN comes up before VS.
I SW TON . The energy loss I SW VOUT TON for a power
DISW VOUT .
Since VOUT < VIN, DBST should always be tied to VOUT (if >2.5V) to maximize efficiency. In general efficiency penalty increases as D decreases. Figure 7 summarizes various ways of bootstrapping the SC2620. A fast switching PN diode (such as 1N4148 or 1N914) and a small (0.1F - 0.47F) ceramic capacitor can be used. In Figure 7(a) the power switch is bootstrapped from the output. This is the most efficient configuration and it also results in the least voltage stress
7.5 Minimum Input Voltage (V) 7.0 6.5
Minimum Starting and Sustaining VIN vs Load Current
DBST TIED TO OUTPUT V OUT = 5V
Minimum Starting and Sustaining VIN vs Load Current
5.5 Minimum Input Voltage (V)
DBST TIED TO OUTPUT V OUT = 3.3V MA729
MA729
5.0
STARTING
STARTING
6.0 5.5 5.0 4.5 1 10 100 1000 Load Current (mA)
DBST TIED TO INPUT SUSTAINING
4.5
DBST TIED TO INPUT
4.0
SUSTAINING
3.5 0.1 1.0 10.0 100.0 1000.0 Load Current (mA)
(a)
(b)
Figure 8. Minimum Input Voltage Required to Start and to Maintain Bootstrap.(TA = 25C).
2006 Semtech Corp. 14 www.semtech.com
SC2620
POWER MANAGEMENT Applications Information
Since the inductor current charges CBST, the bootstrap circuit requires some minimum load current to get going. Figures 8(a) and 8(b) show the dependence of the minimum input voltage required to properly bootstrap a 5V and a 3.3V converters on the load current. Once started the bootstrap circuit is able to sustain itself down to zero load. Shutdown and Soft-Start Each regulating channel of the SC2620 has its own softstart circuit. Pulling its soft-start pin below 0.8V with an open-collector NPN or an open-drain NMOS transistor turns off the corresponding regulator. The other regulator continues to operate. With one channel turned off, the internal bias circuit is kept alive. In the "Typical Characteristics", the soft-start pin current is plotted against the soft-start voltage with VIN = 5V. When one of the softstart pins is pulled low, 105A flows out of that pin. Pulling both soft-start pins below 0.2V shuts off the internal bias circuit of the SC2620. The total VIN current decreases to 40A. In shutdown either SS pin sources only 2A. A fast charging circuit (enabled by the internal bias circuit), which charges the soft-start capacitor below 1V, causes the difference in the soft-start pin currents. If either SS pin is released in shutdown, the internal current source pulls up on the SS pin. When this SS voltage reaches 0.3V, the SC2620 turns on and the VIN quiescent current
2.4V 2V VSS 1V 0.3V 0 1V 0.7V Switching Starts 0
Hiccup Enabled
Fast Charge
VFB
Output must be at least 70% of its set voltage in this interval or the regulator will undergo shutdown and restart (hiccup).
Figure 9(a). Normal Soft-start.
2V
VSS VCOMP
1V 0.3V 0 Switching
Not Switching
Switching
Not Switching
1V 0.7V VFB 0
Figure 9(b).
2006 Semtech Corp.
Start-up Fails due to (i) Short Soft-start Duration or (ii) Output Overload or (iii) Output Short-circuited.
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SC2620
POWER MANAGEMENT Applications Information
increases to 3.3mA. The current flowing out of the other SS pin (which is still pulled low) increases to 105A. The fast charging circuit quickly pulls the released soft-start capacitor to 1V (slightly below the switching threshold). The fast charging circuit is then disabled. A 1.8A current source continues to charge the soft-start capacitor (Figure 3). The soft-start voltage ramp at the SS pin clamps the error amplifier output (Figure 2). During regulator startup, COMP voltage follows the SS voltage. The converter starts to switch when its COMP voltage exceeds 1.1V. The peak inductor current gradually increases until the converter output comes into regulation. Proper soft-start prevents output overshoot during start-up. Current drawn from the input supply is also well controlled. Notice that the inductor current, not the converter output voltage, is ramped during soft-start. Both soft-start capacitors are charged to a final voltage of about 2.4V. Overload / Short-Circuit Protection Each current limit comparator in the SC2620 limits the peak inductor current to 3.2A (typical). The regulator During normal soft-start, both the COMP voltage and the switch current limit gradually increase until the converter becomes regulated. If the regulator output is shorted to output voltage will fall if the load is increased above the current limit. If overload is detected (the output voltage falls below 70% of the set voltage), then the regulator will be shut off. An internal 0.8A current sink starts to discharge the soft-start capacitor. As the soft-start capacitor is discharged below 1V, the discharge current source turns off and the soft-start capacitor is recharged with a 1.8A current source. The regulator undergoes softstart. During soft-start (1V < VSS < 2V), the overload shutdown latch in Figure 3 cannot be set. When VSS exceeds 2V, the set input of the overload latch is no longer blanked. If VFB is still below 0.7V, then the regulator will undergo shutdown and restart. The soft-start process should allow the output voltage to reach 70% of its final value before CSS is charged above 2V. Figures 9(a) and 9(b) show the timing diagrams of successful and failed start-up waveforms respectively. The soft-start interval should also be made sufficiently long so that the output voltage rises monotonically and it does not overshoot its final voltage by more than 5%.
SS1
PGOOD1 SS1
CONTROL1
M1
CSS1
SC2620
OFF ON
CSS1
SC2620
PGOOD1
SS2
SS2
CONTROL2
M2
CSS2
CSS2
CONTROL1 CONTROL2
OFF OFF
ON ON TD (a) (b)
Figure 10. Sequencing the Outputs by (a) Delaying Release of one Channel Relative to the Other and (b) Using PGOOD1 to Control Channel 2.
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SC2620
POWER MANAGEMENT Applications Information
ground, then the COMP voltage will continue to rise to its 2.4V upper limit. The SC2620 will reach its cycle-by-cycle current limit sometime during the soft-start charging phase (see Figure 17(c)). As described previously, the switches in the SC2620 either do not turn on at all or for at least 105ns. With the output shorted, the error amplifier will command the regulator to operate at full duty cycle. The current limit comparator will turn off the switch if the switch current exceeds 3.2A. However, this happens only after the switch is turned on for 105ns. During switch off time, the inductor current ramps down at a slow rate determined by the forward voltage of the freewheeling diode and the resistance of the short. If the resulting reverse volt-second is insufficient to reset the inductor before the start of the next cycle, then the inductor current will keep increasing until the diode forward voltage becomes high enough to achieve volt-second balance. This makes the current limit comparator ineffective. Short circuit robustness will be enhanced if the switching frequency is set below 500kHz at high VIN (> 20V). This increases the off time and keeps the inductor current within bounds. The regulator is to be checked under realistic short circuit condition as the residual resistance of the short can significantly influence circuit behavior. Shortening the soft-start interval from the onset of switching to hiccup enable also makes short circuit operation more robust. A 22-47nF soft-start capacitor is found adequate for most applications. In Figure 17(c), Channel 2 undergoes repeated shutdown and restart ("hiccup") with its output shorted. VSS appears as an asymmetrical triangular wave. The resistance of the short appears to be 17m. Power Good Indicator The PGOOD1 pin (Pin 15) is the open-collector output of Channel 1 power good comparator. This slow comparator is incorporated with a small amount of hysteresis. The FB low-to-high trip voltage of the power good comparator is 90% of the final regulation voltage. A pull-up resistor from the PGOOD1 pin to the input supply or the regulator output sets the logic high level of the comparator. The power good comparator output becomes valid provided that VIN is above 0.9V. In shutdown the power good output is actively pulled low. A power good pull-up resistor tied to the input will therefore increase current drain during shutdown. Tying the power good pull-up resistor to the regulator output is preferred, as this will minimize the
2006 Semtech Corp. 17
shutdown supply current. In shutdown there is no voltage at the switching regulator output or current in the PGOOD1 pull-up resistor. If the PGOOD1 output high level (= VOUT) is unacceptably low, then power good pull-up from the input or a separate power supply will be the only choice. Sequencing the Outputs As mentioned above, pulling either soft-start pin low with an external transistor shuts off the corresponding regulator (Figure 10). Releasing the soft-start pin enables that channel and allows it to start. Delaying the release of the soft-start pin of one channel with respect to the other is a straightforward way of sequencing the outputs. Figure 10(a) shows this method using two external transistors M1 and M2. M1 is turned off first, allowing channel 1 to start. Channel 2 is then enabled after time TD. PGOOD1 can also be used in conjunction with Channel 2 soft-start to delay start of that regulator. This method is depicted in Figure 10(b). SS2 is pulled low and channel 2 is kept off until channel 1 output rises to 90% of its set voltage. Loop Compensation Figure 11 shows a simplified equivalent circuit of a stepdown converter. The power stage, which consists of the current-mode PWM comparator, the power switch, the freewheeling diode and the inductor, feeds the output network. The power stage can be modeled as a voltagecontrolled current source, producing an output current proportional to its controlling input V COMP . Its transconductance GMP is 8-1. With the current loop closed, the control-to-output transfer function
v OUT has a v COMP
dominant-pole p2 located at a frequency slightly higher than that of the output filter pole.
p 2 -
nIOUT n =- VOUT C1 ROUT C1
(8)
where C1 is the output capacitor, ROUT is the equivalent load resistance and n (depending on duty ratio, slope compensation, frequency and passive components) is usually between 1 and 2.
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SC2620
POWER MANAGEMENT Applications Information
V
IN
POWER STAGE -1 GMP = 8 C11 R1
I OUT VOUT ESR C1 ROUT
V COMP R5 C5
GMA = -1 280 + RO 1.6M
FB
C6
1V VOLTAGE REFERENCE
R2
Figure 11. Simplified Control Loop Equivalent Circuit
If C1 is ceramic, then its ESR zero can be neglected as it situates well beyond half the switching frequency. The low frequency gain of the control-to-output transfer function is simply the product of power stage transconductance and the equivalent load resistance (Figure 12). The transfer functions of the feedback network and the error amplifier are:
p 3 = -
1 R5 C 6
In addition C5 and R5 form a zero with angular frequency:
Z1 = - 1 R5 C 5
vFB R2 1 + sC11R1 = v OUT R1 + R2 1 + s R1R2 C11
The (9)
output-to-control
transfer
function
(
)
v COMP v COMP vFB = is also shown in Figure 12. Its midv OUT vFB v OUT R2 band gain (between z1 and p3) is GMAR5 R + R . The 2 1 overall loop gain T(s) is the product of the control-to-output and the output-to-control transfer functions. To simplify
T( j) Bode plot, the feedback network is assumed to be
and
v COMP GMARO (1 + sC 5R5 ) vFB (1 + sC 5RO ) (1 + sC 6R5 )
provided that C 5 >> C 6 and RO >> R5 .
(10)
resistive. If the overall loop gain is to cross 0dB at one In Equation (10), C5 forms a low frequency pole p1 with the output resistance RO of the error amplifier and C6 forms a high frequency pole p3 with R5: tenth of the switching frequency ( C =
RO =
p1
Amplifier Open Loop Gain 53dB = = 1.6M Transconduc tan ce 280 -1
S f = ) at -20dB/ 10 5 decade, then its mid-band gain (between z1 and p2) will be C p 2 S CR = 10 = S 1 OUT n 10n C 1 R OUT
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1 =- ROC 5
18
2006 Semtech Corp.
SC2620
POWER MANAGEMENT Applications Information
R2 This is also equal to GMPROUT GMAR5 R + R . Therefore 2 1
z1 is shown to be less than p2 in Figure 12. Making
z1 =
R 2 S C 1 R OUT GMP R OUT GMA R 5 R + R = 10n . 2 1
Re-arranging,
C S = gives a first-order estimate of C5: 6 60
60 SR 5
C5
(12)
R S C1 R5 = 1 + 1 R2 10nGMP GMA
(11)
Notice that R5 determines the mid-band loop gain of the converter. Increasing R5 increases the mid-band gain and the crossover frequency. However it reduces the phase margin. C6 is a small ceramic capacitor to roll off the loop
Gain
T ( j)
R2 GMA RO R + R 2 1

R2 GMA R5 R +R 2 1 GMP R OUT 1 RO C 5
p1
v COMP v OUT
C C 1 R OUT n 1 R5 C 5 n R OUT C 1
p 2
Control-to-Output Transfer Function
1 R5 C 6 C
p 3
Z1
S 2
Figure 12. Bode Plots of Control-to-Ouput, Output-to-Control and the Overall Loop Gain. Control-to-output transfer function is shown with two poles near half the switching frequency S.
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SC2620
POWER MANAGEMENT Applications Information
gain at high frequency. Placing p3 at about
C6 1 fR 5
S gives: 2
(13)
Example: Determine the compensation components for the 550kHz 9V-16V to 3.3V and 1.2V converter in Figure 1(a). For both channels, S = 3.5 Mrads -1 , IOUT(MAX ) = 2A and
Computed R5, C5 and C6 can indeed result in near optimal load transient responses in over half of the applications. However in other cases empirically determined compensation networks based on optimized load transient responses may differ from those calculated by a factor of 3. Therefore checking the transient response of the converter is imperative. Starting with calculated R5, C5 and C6 (using n=1 in Equations (11)-(13)), apply the largest expected load step to the converter at the maximum operating VIN. Observe the load transient response of the converter while adjusting R5, C5 and C6. Choose the largest R5, the smallest C5 and C6 so that the inductor current waveform does not show excessive ringing or overshoot (see Figures 13(a), 13(b), 16(b) and 16(c)). Feedforward capacitor C11 boosts phase margin over a limited frequency range and is sometimes used to improve loop response. C11 will be more effective if R1 >> R1R2 .
C1 = 22F . n is assumed to be 1 in (11) and (12).
For the 3.3V output:
30.1 k 3.5 x 10 6 22 x 10 -6 R5 = 1 + 13 k 10 (1) (8) (2.8 x 10 -4 ) = 11.3 k C5 C6 60 = 1.5 nF 11.3 k 2 5.5 x 10 5 1 47pF (550 x 10 ) (11.3 x 10 3 )
3
VIN=16V VOUT=3.3V
VIN=16V VOUT=1.2V
40s/div Upper Trace : OUT1 Voltage, AC Coupled, 0.5V/div Lower Trace : L1 Inductor Current, 0.5A/div (a)
40s/div Upper Trace : OUT2 Voltage, AC Coupled, 0.5V/div Lower Trace : L2 Inductor Current, 0.5A/div (b)
Figure 13. Load Transient Response of the Dual DC-DC Converter in Figure 1(a). IOUT1 and IOUT2 are switched between 0.3A and 2A.
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SC2620
POWER MANAGEMENT Applications Information
For the 1.2V channel: Board Layout Considerations In a step-down switching regulator, the input bypass capacitor, the main power switch and the freewheeling
2.61 k 3.5 x 10 6 22 x 10 -6 R7 = 1 + 13 k 10 (1) (8) (2.8 x 10 -4 ) = 4.12 k C8 60 = 3.9 nF 4.12 k 2 5.5 x 10 5 1 150pF (550 x 10 ) (4.12 x 10 3 )
3
C9
Bench measurement shows that compensation components computed from our simplified linear model give very good load transient response for Channel 1 (Figure 13(a)). However, optimizing load transient for Channel 2 will require a set of compensation component values different from those calculated above. Loop compensation networks shown in Figure 1(a) are empirically optimized for load transients. Figures 13(a) and 13(b) show the corresponding load transient responses.
di (Figure dt 14). For jitter-free operation, the size of the loop formed by these components should be minimized. Since the power switches are already integrated within the SC2620, connecting the anodes of both freewheeling diodes close to the negative terminal of the input bypass capacitor minimizes size of the switched current loop. The input bypass capacitors should be placed close to the PVIN pins. Shortening the traces of the SW and BOOST nodes reduces the parasitic trace inductance at these nodes. This not only reduces EMI but also decreases switching voltage spikes at these nodes.
diode carry discontinuous currents with high The PVIN bypass capacitor C 15, the output filtering capacitors and the freewheeling diodes are to be grounded on the power ground plane (Figure 15). The feedback resistive dividers, the compensation networks, the soft-
V IN
VOUT
ZL
Figure 14. Fast Switching Current Paths in a Buck Regulator. Minimize the size of this loop to reduce parasitic trace inductance.
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SC2620
POWER MANAGEMENT Applications Information
start capacitors and the VIN filtering capacitor C16 are to be tied to the analog ground. The frequency-setting resistor R9 is placed next to the ROSC pin and is also connected to the analog ground. R20 is a 0 resistor that connects the analog ground to the power ground at a single point. The exposed pad should be soldered to a large analog ground plane as the analog ground copper acts as a heat sink for the device. To ensure proper adhesion to the ground plane, avoid using vias directly under the device. In figure 15 two 12mil vias are placed at the edge of the underside pad.
OUT1
R5 L1 D3 R1 R2 C6 C5 IN or OUT1 C1 D1 C2 R6 C7 R9
AGND
IN
GND
C15
IN
U1 C16 C10 R10
C3
D2
C4 C8 C9 D4 R7 R3 R4 R20
L2
OUT2
GND
Figure 15. Suggested PCB Layout for the SC2620.
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SC2620
POWER MANAGEMENT Typical Application Circuits
R5 15.8k C7 SS1 22nF R9 15.0k C10 SS2 22nF R7 9.76k C8 COMP2 C9 390pF FB2 BOOST2 GND SW2 D4 1N4148 C4 0.1F C3 22F R4 10.7k C5 390pF FB1 COMP1 BOOST1 D3 C2 0.1F SW1 5V VIN ROSC PGOOD1 VIN PVIN R10 10F 10 C16 0.1F D2 10BQ 015 C15 1N4148 L1 D1 1.8H 10BQ 015 C1 10F R1 24.9k R2 10.7k OUT1 3.3V/2A
Efficiency
95 90 85 Efficiency (%) 80 75 70 65 60 55 50 0 0.5 1 1.5 2 VIN = 5V VOUT2 = 1.2V VOUT1 = 3.3V
SC2620
L2 1.8H R3 2.15k
OUT2 1.2V/2A
10pF
L1 & L2: Wurth 744 062 0018 C1 & C15: Murata GRM21BR60J106K C3: Murat a GRM21BR60J 226M
Load Current (A)
Figure 16(a). 1.2MHz 5V to 3.3V and 1.2V xDSL Power Supply. Channel 2 does not start until Channel 1 output voltage becomes regulated.
OUT1
OUT2
40s/div Upper Trace : OUT1 Voltage, AC Coupled, 0.5V/div Lower Trace : L1 Inductor Current, 0.5A/div (b)
40s/div Upper Trace : OUT2 Voltage, AC Coupled, 0.2V/div Lower Trace : L2 Inductor Current, 0.5A/div (c)
Figures 16(b) and 16(c). Load Transient Response. IOUT is switched between 0.3A and 2A.
2006 Semtech Corp.
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SC2620
POWER MANAGEMENT Typical Application Circuits
C5 D3 C2 0.1F SW1 SS1 47nF R9 51.1k C10 22nF R7 PVIN ROSC PGOOD1 SS2 C8 COMP2 SW2 D4 1N4148 FB2 BOOST2 GND C4 0.1F VIN 0.1F D2 UPS120 L2 4.7H C3 47F R3 8.06k 10F R10 10 C16 12V C15 1N4148 L1 D1 UPS120 15H C1 22F R1 60.4k R2 15.0k C11 47pF C12 47pF R12 4.02k OUT2 0.8V/2A OUT1 5V/2A R11 80.6k
R5
FB1 COMP1 BOOST1
15.4k C6 1nF C7 47pF
SC2620
8.25k C9 1nF 22pF
L1 : Coiltronics DR74 L2 : Coiltronics DR73
C1: Murata GRM21BR60J 226M C3: Murata GRM31CR60J476M C15: Murata GRM32DR61E106K
Figure 17(a). 500kHz 12V to 5V and 0.8V step-down converter. Notice that VOUT2 is lower than the nominal FB voltage. R11 and R12 constitute the feedback voltage divider for Channel 2.
CH1
CH2
CH3
CH4
4ms/div CH1 : VIN, 5V/div CH2 : OUT1 Voltage, 2V/div CH3 : OUT2 Voltage, 0.5V/div CH4 : SS2 Voltage, 2V/div Figure 17(b). VIN Start-up Transient (IOUT1 = IOUT2 = 1.5A).
10ms/div Upper Trace : OUT2 Voltage, 0.1V/div Middle Trace : SS2 Voltage, 1V/div Lower Trace : IL2, 2A/div
Figure 17(c). Channel 2 Output Short-circuit Hiccup.
2006 Semtech Corp.
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SC2620
POWER MANAGEMENT Typical Application Circuits
R5 11.3k C5 C6 2.2nF FB1 BOOST1 COMP1 SS1 0.1F R9 82.5k ROSC PGOOD1 C10 SS2 0.1F C9 COMP2 R7 47pF C8 2.7nF FB2 BOOST2 GND SW2 D4 1N4148 C4 0.1F VIN SW1 D3 C2 1N4148 0.1F
C7 68pF
L1 R1 60.4k C1 22F R2 15.0k C11 47pF C12 47pF
OUT1 5V/2A
SC2620
PVIN
12-30V
C15
D1 UPS140
22H
R10 10F 10 C16 0.1F D2 UPS140
L2 10H R3 5.76k C3 47F R4 11.5k
OUT2 1.5V/2A
12.4k
C1 : Murat a GRM21BR60J226M C3 : Murat a GRM31CR60J 476M C15: Murata GRM32DF51H106Z
L1 : Coiltronic DR74 L2 : Coiltronic DR73
Figure 18(a). 350kHz 12V-30V Input to 5V and 1.5V Step-down Converter. Notice that Channel 2 is bootstrapped from OUT1. Channel 2 will be held off if OUT1 voltage is below 90% of its set value.
CH1
CH1 : SW1 Voltage, 10V/div CH2 : SW2 Voltage, 10V/div
CH2
V IN = 30V
2s/div Figure 18(b). Switching Waveforms. IOUT1= IOUT2= 1A.
Efficiency
90 85 80 Efficiency (%) 75 Efficiency (%) 70 65 60 55 50 45 40 0 0.5 1 1.5 2 Load Current (A) VIN = 12V V OUT2 = 1.5V V OUT1 = 5V 90 85 80 75 70 65 60 55 50 45 40 0 0.5 1 1.5 2 Load Current (A) V IN = 24V VOUT2 = 1.5V VOUT1 = 5V
Efficiency
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SC2620
POWER MANAGEMENT Outline Drawing - SOIC-16 EDP
A e N 2X E/2 E1 E D
DIM
A A1 A2 b c D E1 E e F H h L L1 N 01 aaa bbb ccc
DIMENSIONS INCHES MILLIMETERS MIN NOM MAX MIN NOM MAX
.053 .069 .000 .005 .049 .065 .012 .020 .007 .010 .386 .390 .394 .150 .154 .157 .236 BSC .050 BSC .100 .105 .110 .080 .085 .090 .010 .020 .016 .028 .041 (.041) 16 0 8 .004 .010 .008 1.75 0.13 1.65 0.51 0.25 9.90 10.00 3.90 4.00 6.00 BSC 1.27 BSC 2.54 2.67 2.79 2.03 2.16 2.29 0.25 0.50 0.40 0.72 1.04 (1.04) 16 0 8 0.10 0.25 0.20 1.35 0.00 1.25 0.31 0.17 9.80 3.80
1 ccc C 2X N/2 TIPS
2
3 e/2 B
D aaa C SEATING PLANE A2 A C bxN bbb F C A-B D A1
EXPOSED PAD
H c
H
GAUGE PLANE 0.25 DETAIL L (L1)
01
A
h
h SIDE VIEW
SEE DETAIL
A
NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. DATUMS -AAND -B-HTO BE DETERMINED AT DATUM PLANE
3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 4. REFERENCE JEDEC STD MS-012, VARIATION AC.
Land Pattern - SOIC-16 EDP
THERMAL VIA O 0.36mm E D SOLDER MASK
DIM
(C) F G Z C D E F G P X Y Z
DIMENSIONS INCHES MILLIMETERS
(.205) .114 .201 .094 .118 .050 .024 .087 .291 (5.20) 2.90 5.10 2.40 3.00 1.27 0.60 2.20 7.40
Y
P
X
NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET.
2. REFERENCE IPC-SM-782A, RLP NO. 300A. 3. THERMAL VIAS IN THE LAND PATTERN OF THE EXPOSED PAD SHALL BE CONNECTED TO A SYSTEM GROUND PLANE. FAILURE TO DO SO MAY COMPROMISE THE THERMAL AND/OR FUNCTIONAL PERFORMANCE OF THE DEVICE.
Contact Information
Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012-8790 Phone: (805)498-2111 FAX (805)498-3804
2006 Semtech Corp. 26 www.semtech.com

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